iTVC15 Firmware upload

This page describes how to upload the firmware to the card. The calling procedure will be described on the firmware-calling.html page and the API will be described on the firmware-api.html page. Information about the memory map of the card and the registers are described on the memory-map.html page.

How to find
The firmware is Conexant property. As such, I am not entitled to distribute it without a license from Conexant. Fear not. The complementary Windows coaster so thoughtfully supplied with your card contains this particular magic, but it's hidden. This is information on how to locate both the images you need.
  • Unpack the driver.
  • Locate the hcw98gp2.sys file.
  • Each firmware image is 256k bytes.
  • The 2nd 32-bit word of both images are 0xaa55bb66
  • The 1st 32-bit word of the Encoder image is 0x0000da7
  • The 1st 32-bit word of the Decoder image is 0x00003a7
  • You need both images.


How to load

  • Issue the FWapi command to stop the encoder if it is running. Wait for the command to complete.
  • Issue the FWapi command to stop the decoder if it is running. Wait for the command to complete.
  • Issue the I2C command to the digitizer to stop emitting VSYNC events.
  • Issue the FWapi command to halt the encoder's firmware.
  • Sleep for 10ms.
  • Issue the FWapi command to halt the decoder's firmware.
  • Sleep for 10ms.
  • Write 0x00000000 to register 0x2800 to stop the Video Display Module.
  • Write 0x00000005 to register 0x2D00 to stop the AO (audio output?).
  • Write 0x00000000 to register 0xA064 to ping? the APU.
  • Write 0xFFFFFFFE to register 0x9058 to stop the VPU.
  • Write 0xFFFFFFFF to register 0x9054 to reset the HW blocks.
  • Write 0x00000001 to register 0x9050 to stop the SPU.
  • Sleep for 10ms.
  • Write 0x0000001A to register 0x07FC to init the Encoder SDRAM's pre-charge.
  • Write 0x80000640 to register 0x07F8 to init the Encoder SDRAM's refresh to 1us.
  • Write 0x0000001A to register 0x08FC to init the Decoder SDRAM's pre-charge.
  • Write 0x80000640 to register 0x08F8 to init the Decoder SDRAM's refresh to 1us.
  • Sleep for 512ms. (600ms is recommended)
  • Transfer the encoder's firmware image to offset 0 in Encoder memory space.
  • Transfer the decoder's firmware image to offset 0 in Decoder memory space.
  • Use a read-modify-write operation to Clear bit 0 of register 0x9050 to renable the SPU.
  • Sleep for 1 second.
  • Use a read-modify-write operation to Clear bits 3 and 0 of register 0x9058 to renable the VPU.
  • Sleep for 1 second.
  • Issue staus API commands to both firmware images to verify.


Copyright 2003 The IvyTV Team
iTVC15 is a trademark of Conexant Systems, Inc.
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